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Curriculum Vitae

Masahiro Hiramori (平森 将裕)

E-mail: [email protected]
Location: Greater Tokyo Area (Kanagawa), Japan
GitHub: mshr-h
LinkedIn: masahiro-hiramori

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Languages: Japanese (Native), English (Professional working proficiency)
Nationality: Japanese

Professional Summary

AI Systems and ML Compiler Engineer with 9+ years of experience building compiler, runtime, and deployment infrastructure that brings PyTorch and ONNX models to resource-constrained industrial hardware. Currently a Head Engineer in Mitsubishi Electric’s Open-Source & InnerSource Program Office (OSPO), I connect industrial AI requirements with upstream PyTorch and Apache TVM development, set technical direction across R&D teams, and provide architecture guidance for ML compilers, edge inference, and on-device LLMs. I am an Apache TVM Committer, PyTorch Ambassador, and Microsoft Hummingbird Committer.

Selected Impact

  • 140+ merged Apache TVM pull requests spanning torch.export.ExportedProgram import, Relax, dynamic shapes, targets, runtimes, and CI.
  • 1.44M+ installs for the Verilog/SystemVerilog extension for Visual Studio Code.
  • 9+ years building AI systems, ML compiler infrastructure, and edge deployment pipelines.
  • 100+ FPS object-detection runtime on AMD/Xilinx Zynq UltraScale+ MPSoC.

Selected Engineering Work

  • Apache TVM: Introduced and maintain the PyTorch torch.export.ExportedProgram frontend for TVM Relax, with continued ownership across dynamic-shape support, control flow, targets, runtimes, and CI.
  • PyTorch integration: Developed compiler backend and model-import paths, contributed platform compatibility improvements, and represent industrial and edge deployment use cases as a PyTorch Ambassador.
  • ONNX interoperability: Built onnx2fx to convert ONNX models into inspectable and transformable PyTorch FX graphs, and contributed related conversion and runtime work to Microsoft Hummingbird and ONNX-MLIR.
  • Edge and on-device AI: Built and validated deployment pipelines across NVIDIA Jetson Orin, Rockchip RK3588, Hailo-8, Renesas RZ/V2H, and FPGA accelerators for computer vision and language-model workloads.

Skills

  • Programming Languages: C, C++, Python
  • ML Compilers & Model Interchange: PyTorch, torch.export / ExportedProgram, PyTorch FX, Apache TVM (Relax / MetaSchedule), ONNX, ONNX-MLIR, Microsoft Hummingbird
  • Runtime Systems & Edge AI: C++ runtime systems, model conversion and compilation, edge inference, on-device LLMs, computer vision, performance tuning, NVIDIA Jetson Orin, Rockchip RK3588, Hailo-8, Renesas RZ/V2H, FPGA accelerators
  • Open-Source Engineering & DevOps: Upstream development, code review, maintainer workflows, CI/CD, GitHub Actions, containerization, test automation, reproducible builds
  • Technical Leadership: Technical roadmapping, architecture review, cross-functional collaboration, mentoring, OSPO

Experience

Head Engineer, Open-Source & InnerSource Program Office, Mitsubishi Electric Corporation, Japan - Apr 2025 to Present

  • Set technical direction for ML compiler and edge-AI open-source adoption across multiple R&D teams, connecting industrial deployment requirements to upstream PyTorch and Apache TVM development.
  • Led deployment validation of a 1.8B-parameter manufacturing-domain language model on Jetson Orin Nano and RK3588, measuring latency, memory use, and portability across constrained edge environments.
  • Shape company-wide adoption of open-source and InnerSource engineering practices for AI/ML software, with emphasis on ML compilers, edge inference, and on-device LLMs.
  • Provide architecture review and mentoring across compiler integration, edge deployment, and open-source engineering.

Head Researcher, Information Technology R&D Center, Mitsubishi Electric Corporation, Japan - Apr 2024 to Mar 2025

  • Expanded upstream ownership in Apache TVM and became a Committer in September 2024.
  • Led R&D on ML compiler frontends and edge deployment pipelines connecting PyTorch and ONNX models to Apache TVM and heterogeneous hardware.
  • Evaluated Apache TVM MetaSchedule on edge devices and co-authored a peer-reviewed paper presented at IEEE GCCE 2024.
  • Developed an on-device deployment pipeline for a manufacturing-domain language model on NVIDIA Jetson Orin Nano and Rockchip RK3588, including model conversion, optimization, and runtime integration.

Researcher, Information Technology R&D Center, Mitsubishi Electric Corporation, Japan - Apr 2017 to Mar 2024

  • Developed a C++ user-mode driver and runtime stack for a proprietary FPGA-based neural-network accelerator, achieving 100+ FPS object detection on AMD/Xilinx Zynq UltraScale+ MPSoC.
  • Built image-anomaly-detection pipelines on Hailo-8 and Renesas RZ/V2H for visual inspection in manufacturing, optimizing models and runtimes for resource-constrained edge devices.
  • Prototyped end-to-end model conversion, compilation, and deployment pipelines using Apache TVM and related tooling across heterogeneous edge hardware.
  • Contributed upstream to Apache TVM, Microsoft Hummingbird, and ONNX-MLIR, focusing on PyTorch model import, CI/CD infrastructure, and industrial edge workloads.

Open-Source & Community Activities

Apache TVM (Committer)

  • Authored 140+ merged pull requests as of July 2026 across Relax and PyTorch frontends, torch.export.ExportedProgram import, dynamic-shape support, target and runtime fixes, and CI modernization.
  • Introduced and maintain the ExportedProgram frontend, enabling models exported with PyTorch 2 torch.export to be imported into TVM Relax.
  • Review and maintain contributions related to Relax frontends, model import and export, compiler infrastructure, and CI pipelines.

PyTorch (Contributor)

  • Contributed integration paths between PyTorch and Apache TVM, including TVM backend interfaces, MetaSchedule configuration, and platform compatibility fixes.
  • Represent industrial and edge deployment use cases in the wider PyTorch community as a PyTorch Ambassador.

Microsoft Hummingbird (Committer)

  • Integrated Apache TVM as a backend for converting and executing classical machine-learning models.
  • Extended CI pipelines to validate model conversion and execution on TVM-based runtimes.

Selected Projects

vscode-verilog-hdl-support, Creator, Maintainer

  • Created and maintain a Verilog/SystemVerilog development extension for Visual Studio Code with 1.44M+ installs on the Visual Studio Marketplace. It provides syntax highlighting, snippets, linting, formatting, waveform viewing, and optional language-server integration for FPGA/ASIC development workflows.

onnx2fx, Creator, Maintainer

  • Created an Apache-2.0-licensed converter that turns ONNX models into inspectable, transformable, and trainable PyTorch FX GraphModule objects for optimization, analysis, and deployment.

Professional & Community Service

  • PyTorch Ambassador, PyTorch Community
    • Represent industrial AI, edge deployment, and ML compiler use cases in the PyTorch community.
  • Program Committee Member, PyTorch Conference 2025

Education

M.S. in Information Science and Technology
Osaka Institute of Technology, Japan - Apr 2015 to Mar 2017

B.A. in Information Science and Technology
Osaka Institute of Technology, Japan - Apr 2011 to Mar 2015

Publications (Selected)

Patents

Media Coverage

Awards & Recognition

  • PyTorch Community Awards 2025 - Nominee
  • PyTorch Community Awards 2024 - PyTorch Innovator Nominee